/*
 * spl06.h
 *
 *  Created on: Sep 13, 2021
 *      Author: soliber
 */

#ifndef SPL06_DRIVER_SPL06_H_
#define SPL06_DRIVER_SPL06_H_

#include "main.h"
#include "i2c.h"

/*---------------- Macro Define ----------------*/
/**
 * I2C Slave Address
 */
#define SPL_ADDR_DEAFAULT	0x77
#define SPL_ADDR_PULLDOWN	0x76

/**
 * Register Map
 */
#define SPL_PSR_B2 	0x00
#define SPL_PSR_B1 	0x01
#define SPL_PSR_B0 	0x02
#define SPL_TMP_B2 	0x03
#define SPL_TMP_B1 	0x04
#define SPL_TMP_B0 	0x05
#define SPL_PRS_CFG 	0x06
#define SPL_TMP_CFG 	0x07
#define SPL_MEAS_CFG 	0x08
#define SPL_CFG_REG 	0x09
#define SPL_INT_STS 	0x0A
#define SPL_FIFO_STS 	0x0B
#define SPL_RESET 		0x0C
#define SPL_ID 		0x0D
#define SPL_COEF		0x10
#define SPL_COEF_LEN	18

/**
 * PSR_CFG and TMP_CFG Defines
 */
#define EXT_SENSOR			(1<<7)
#define SAMPLE_RATE_1HZ	(0<<4)
#define SAMPLE_RATE_2HZ	(1<<4)
#define SAMPLE_RATE_4HZ	(2<<4)
#define SAMPLE_RATE_8HZ	(3<<4)
#define SAMPLE_RATE_16HZ	(4<<4)
#define SAMPLE_RATE_32HZ	(5<<4)
#define SAMPLE_RATE_64HZ	(6<<4)
#define SAMPLE_RATE_128HZ	(7<<4)
#define OVERSAMPLE_RATE_1HZ	(0)
#define OVERSAMPLE_RATE_2HZ	(1)
#define OVERSAMPLE_RATE_4HZ	(2)
#define OVERSAMPLE_RATE_8HZ	(3)
#define OVERSAMPLE_RATE_16HZ	(4)
#define OVERSAMPLE_RATE_32HZ	(5)
#define OVERSAMPLE_RATE_64HZ	(6)
#define OVERSAMPLE_RATE_128HZ	(7)

/**
 * MEAS_CFG Defines
 */
#define COEF_RDY_FLAG		(1<<7)
#define SENSOR_RDY_FLAG	(1<<6)
#define TMP_RDY_FLAG		(1<<5)
#define PRS_RDY_FLAG		(1<<4)
#define STANDBY_MODE		(0)
#define COMMAND_MODE_PRES	(1)
#define COMMAND_MODE_TEMP	(2)
#define BACKGROUND_MODE_PRES	(5)
#define BACKGROUND_MODE_TEMP	(6)
#define BACKGROUND_MODE_BOTH	(7)

/**
 * CFG_REG Defines
 */
#define INT_ACTIVE_HIGH	(1<<7)
#define INT_ACTIVE_LOW		(0<<7)
#define INT_FIFO_ENABLE	(1<<6)
#define INT_PRS_ENABLE		(1<<5)
#define INT_TMP_ENABLE		(1<<4)
#define TEMP_BIT_SHIFT		(1<<3)
#define PRES_BIT_SHIFT		(1<<2)
#define FIFO_ENABLE		(1<<1)
#define SPI_4WIRE			(0<<0)
#define SPI_3WIRE			(1<<0)

/**
 * INT_STS Defines
 */
#define FIFO_FULL_INT_FLAG	(1<<2)
#define TMP_INT_FLAG		(1<<1)
#define PRS_INT_FLAG		(1<<0)

/**
 * FIFO_STS Defines
 */
#define FIFO_IS_FULL		(1<<1)
#define FIFO_NOT_FULL		(0<<1)
#define FIFO_IS_EMPTY		(1)
#define FIFO_NOT_EMPTY		(0)

/**
 * RESET Defines
 */
#define FIFO_FLUSH			(1<<7)
#define SOFT_RST			(0x09)

/**
 * ID Defines
 */
#define PRODUCT_ID_MASK	(0xf0)
#define REVISION_ID_MASK	(0x0f)

/*---------------- Type Defines ----------------*/

typedef enum {
	SPL_OK = 0,
	SPL_ERROR = -1
}spl_status_t;

typedef enum{
	SPL_IIC,
	SPL_SPI
}spl_itf_t;

typedef enum{
	SPL_STANDBY = 0,
	SPL_COMMAND_PRES = 1,
	SPL_COMMAND_TEMP = 2,
	SPL_BACKGROUND_PRES = 5,
	SPL_BACKGROUND_TEMP = 6,
	SPL_BACKGROUND_BOTH = 7
}spl_op_mode_t;

typedef struct{
	uint8_t sample_rate;
	uint8_t oversample;
}spl_measure_cfg_t;

typedef struct{
	uint8_t dev_addr;
	spl_itf_t interface;
	spl_op_mode_t mode;
	spl_measure_cfg_t temp_cfg;
	spl_measure_cfg_t pres_cfg;
	uint8_t id;
}spl_init_t;

void spl_irq(void);

#endif /* SPL06_DRIVER_SPL06_H_ */
